Silicon photonics is rapidly gaining importance as generic technology platform for a wide range of applications in telecom, data communications (datacom), interconnect, and sensing. It allows implementing photonic functions through the use of complementary metal-oxide-semiconductor (CMOS) compatible wafer-scale technologies on high quality, low cost silicon substrates, in order to fabricate silicon photonic chips.
Especially for short distance applications like datacom, interconnect, or access networks, chip cost is a major concern. By employing the benefits of silicon mass production, the price of a photonic chip integrating hundreds of basic building blocks can be extremely aggressive. However, due to the fact that silicon is an indirect band gap material, it is difficult to monolithically integrate active components. Therefore, photonic chips and active devices need to be butt-coupled or flip-chip-coupled, which result in expensive packaging. Else, the fabrication process becomes more complex.
One solution to this problem is growing germanium on silicon. While this solution allows fabricating photodetectors and electro-absorption modulators, the fabrication process is quite complex. Further, the fabricated components are not as good as III-V semiconductor components. Furthermore, amplifiers and lasers are still not available with this solution.
As an alternative solution, heterogeneous integration by wafer-bonding has been proposed. While promising results have been obtained with this solution, it nevertheless remains impractical, because of the need of III-V semiconductor processing on silicon wafers.
A third solution uses a transfer technology (e.g. flip-chip or transfer-printing), which allows for high throughput placement of finished devices. As shown in FIG. 7, an active device 701 and a photonic chip 702 can be interfaced using a butt-coupling approach, wherein waveguide facets 703 of the two devices 701, 702 are mechanically placed face-to-face. If the modes of the waveguides 703 respect certain rules, and if alignment is accurate (as shown in FIG. 7, left-hand side), light can flow between the two butt-coupled devices 701, 702 with minimum loss.
This technology potentially reduces the cost of silicon photonics chips even further, while at the same time increasing their performance. There are several reasons for this potential. All III-V semiconductor processing can be done in a dedicated III-V fab, and on wafers with dense arrays of identical devices. Since the devices can be packed closely together, the cost per device can be quite low. Further, wafers can be fully optimized for a device, which is an advantage over monolithic integration. Then, the III-V semiconductor devices can be transferred or bonded onto the silicon photonic platform.
There is, however, one issue with this solution: The alignment accuracy, which can be achieved for this technology with the currently available machines, is limited (i.e. to about 3σ<1.5 micrometers (μm). When misaligning the two waveguides 703 (as shown in FIG. 7, right-hand side), insertion loss increases rapidly. That is, in order to be able to use this solution for high performance communication application products, an alignment tolerant interface between the active device 701 and the photonic chip 702 needs to be provided.
Solutions for more alignment tolerant interfaces involve the use of waveguide engineering, particularly in order to enlarge the optical mode both at the active device and the photonic chip facet. A wider mode is intrinsically less sensitive to misalignment than a tight one. However, often a more complex processing—both on the active device side and on the photonic chip side—is required, and significantly increases the chip cost.
As shown in FIG. 8, the so-called trident coupler 800 has been proposed for the photonic chip side, as a way to increase horizontal alignment tolerances without increasing fabrication complexity. The use of the trident coupler 800 allows for a larger optical mode profile on the photonic chip side, and thus indeed for a more tolerant coupling compared to, for instance, an inverted taper coupler. In particular, with the trident coupler 800, light is received, for instance from an active device like a laser, by means of a double-core Si waveguide 801, and is then transferred adiabatically within the trident coupler 800 to a single Si waveguide 802.
To improve the alignment tolerance even further—as shown in FIG. 9—an alternative optical coupler 900 has been proposed. In this version, there is still a double-core waveguide 901 at the edge for receiving light from an active device like a laser. However, the received light is then not recombined adiabatically into one single waveguide, as in the trident coupler 800 of FIG. 8, but remains in two separate output waveguides 902. With this design, a lateral misalignment of e.g. the laser or a fiber relative to the photonic chip 900 is accommodated by a varying phase difference between the two on-chip single mode output waveguides 902, to which the light is transferred. Compared to the trident coupler 800 design of FIG. 8, the alignment tolerances are improved, because it is possible to couple to both to the first order and second order mode of the two core waveguides 901 at the chip edge.
The main drawback of the design of this optical coupler 900 is that the two output waveguides 902 can only be used separately. That is, the power of the two output waveguides 902 cannot be easily recombined into a single channel, due to the phase mismatch between the optical modes of the two output waveguides 902, which depends on the misalignment between the coupled devices.
Recombining the two modes into a single waveguide or channel, for instance an optical fiber, could result in constructive recombination (no loss) or destructive recombination (no transmission)—depending on the phase relation. For most applications, two separate output waveguides 902 are not acceptable, and the solution shown in FIG. 9 can therefore not be used.